Less codage

Minerva
Apple moving on to Intel was the stupidest idea ever. It had to be the other way around, PC's had to go over to some kind of RISC architecture... which is what AMD is doing, sorta. The new 64 bit chips look more like RISC processors than CISC. This is going to be the salvation of my Minerva project. Intel processors have few GPRs (8), compared to the SH4 (16). This results in having to do constant register allocation Bleh. It also means your purdy 3.0ghz P4 will look like a little old granny.
Changes to the Minerva plans:
1) No more copy+paste. This was a technique I'd use to permit cross-platform code generation, but it relies on the DC's registers to be stored on memory rather than on native registers . Instead, I'll have to use...
2) Proper code generation. Generating optimized binary code rather than copying general-purpose code.

To do:
1) Save money, get a 64bit machine to work on. ^_^
2) Re-do the processor in assembly rather than C
3) RAM code can be re-used, but must still be finished.
4) Debug interface


Other projects
The other projects have all progressed... sorta. I've been working on code that will be usefull for all of them:
the XML/INI loader for configurations, MIX-Loader for storing game files (Now with Blowfish encryption support!), and an assembler for ARM processors (part of a VM that will run some of my projects [Tamagochi, space game, etc.] on my GP2X).